AN FPGA-BASED BCI SYSTEM WITH SSVEP AND PHASED CODING TECHNIQUES

Jzau-Sheng Lin；Wun-Ciang Wu

BCI ； SSVEP ； phase coding.

技術學刊

33卷1期（2018 / 03 / 01）

53 - 62

英文

A Field Programmable Gate Array (FPGA) was used to implement a Steady State Visual Evoked Potential (SSVEP) -based Brain Computer Interface (BCI) system with phased coding in this paper. There are several subsystems to be constructed including a visual stimulus penal, Electroencephalograph (EEG) acquisition circuit, EEG signal processor, and Bluetooth module, respectively. Additionally, we implemented a phase-coding circuit for SSVEP by FPGA to extend the control commands for a high-frequency stimuli flickering signal with 20 Hz by different phases (0°, 90°, 180°, and 270°) to relieve subjects' eyes fatigue. Then the Fast Fourier Transformation (FFT), also implemented by FPGA, was used to get the frequency spectrum to find the relative stimulus frequency on EEG signals. A white-colored LED was also used to act as a visual stimulus source to get more performance. From experimental results, the acceptable correct rate can be obtained with a FPGA-based BCI system with SSVEP and phase-coding techniques.

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