| 题名 |
Via-Filling Process Capability and Capacity Improvement |
| 并列篇名 |
填孔製程能力與產能改善 |
| DOI |
10.6220/joq.2015.22(4).05 |
| 作者 |
蔡逸彥(Yi-Yen Tsai)；林宗漢(Zong-Han Lin) |
| 关键词 |
印刷電路板 ； 全層互連高密度連結板 ； 填孔 ； 雙軌式垂直連續電鍍設備 ； printed circuit board ； every layer interconnection ； via-filling ； double track vertical continuous plating |
| 期刊名称 |
品質學報 |
| 卷期/出版年月 |
22卷4期（2015 / 08 / 30） |
| 页次 |
347 - 362 |
| 内容语文 |
英文 |
| 中文摘要 |
自2012年第三季開始，由於高階智慧型手機市場的蓬勃發展，帶動其所使用的全層互連高密度連接印刷電路板需求快速增加。在全層互連高密度連接板全製程中，填孔電鍍是最重要且關鍵的製程技術。為了滿足全層互連高密度連接板對於填孔品質之要求，公司決定導入雙軌式垂直連續電鍍設備於一般盲孔通孔電鍍。在導入初期，製程中品質檢驗批退率超過9%（目標為小於1%），產能亦嚴重短缺約200片／天。因此，如何有效降低填孔批退率且提高填孔製程產能，成為公司亟需解決之問題。本研究使用日本學者狩野紀昭博士所提出之「垂直式品質評價」（Vertical Evaluation）及「產品規格製程參數矩陣」手法進行問題解析，並結合基礎電化學知識找出影響填孔品質之關鍵因子有三個：工作電壓（working voltage）、電流密度（current density）、擴散層厚度（thicknessof diffusion layer）。找出關鍵因子之後，利用實驗設計方法尋找最佳參數組合。經過本研究改善後，填孔製程中品質檢驗批退率成功降至0.4%，產能亦比原先改善前增加5倍，有效提升全層互連高密度連接板之填孔製程能力。 |
| 英文摘要 |
Since 2012 Q3, the market has been increased dramatically in the high-end smart phones using ELIC (every layer interconnection) PCB (printed circuit board). The via-filling copper plating process is one of the most important and critical processes among the ELIC PCB manufacture. One of our copper plating lines, DVCP (double track vertical continuous plating) from Applied Equipment Limited (AEL) company, had to be switched to do the via-filling process for match the high-end smart phone demand though this line was not designed to do so. At the very beginning of switching stage, the in-process quality fail rate of this DVCP was over 9% (target ＜ 1%), and the capacity was short around 200 panels per day. From the basic electro-chemistry theory, the key factors of via-filling process are working voltage (Volt), current density (Ampere/area) and the thickness of diffusion layer. In the plating system, the working voltage must overcome the polarization effect from uneven distribution of resistance, oxygen, hydrogen, chemical concentration on the surface of plating panel. By finding the optimization working voltage 4.5V and changing the thickness of diffusion layer at some specific area on the surface of plating panel in the DVCP via-filling system, the in-process quality fail rate was achieved to 0.4% from 9%. The current density is relative to line throughputs. The higher current density which is one of the plating parameter means more throughputs. According to Ohm's Law, the optimization working voltage 4.5V was found and fixed, so the only way to increase the current density was lower the plating chemical solution resistance by adjusting the sulfuric acid concentration to 60g/L. The capacity of this line was gained over 1,197 panels per day. |
| 主题分类 |
社會科學 >
管理學 |
| 参考文献 |
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