An Efficient Power-Saving Scheduling Algorithm

10.6138/JIT.2016.17.1.20120506

Keng-Mao Cho；Chun-Wei Tsai；Chu-Sing Yang

Embedded system ； Network devices ； Power-saving ； Dynamic voltage

網際網路技術學刊

17卷1期（2016 / 01 / 01）

63 - 71

英文

Dynamic voltage and frequency scaling to reduce power consumption in embedded systems is a promising research domain. Most of these approaches usually use the ratio between the deadline of a task and the worst case execution time of the task to modify the processor’s operating frequency. As a result, an analysis of the given application must be conducted to obtain some parameters for the algorithm. Since countless applications are available for portable devices, it is difficult to implement these approaches on portable devices. To deal with these issues, an efficient algorithm for reducing power consumption that can be easily implemented on an actual hardware device is presented. The proposed algorithm combines priority-based scheduling and earliest deadline first scheduling to schedule real-time tasks and normal tasks. It then uses a periodic routine to check whether the system has satisfied any conditions that require it to modify the operating mode. The experiment results show that the proposed algorithm can reduce energy consumption by up to 45.1%.