题名 |
a-Si: H TFT SiN(下標 x)介電層製程改善 |
并列篇名 |
The Improvement of a-Si:H TFT SiN(subscript x) Dielectric Layer Process |
DOI |
10.29688/MHJ.201002.0004 |
作者 |
陳炳茂(B.M Chen);謝育霖(Y. L. Shieh);鄒一德(Y. D. Zou);劉柏村(P. T. Liu) |
关键词 |
非晶矽薄膜電晶體 ; NH3/SiH4 ; 介電層 ; 電壓應力 ; 缺陷池模型 ; a-Si TFT ; NH3/SiH4 ; Dielectric layer ; Voltage bias stress ; Defect poor mode |
期刊名称 |
明新學報 |
卷期/出版年月 |
36卷1期(2010 / 02 / 01) |
页次 |
33 - 41 |
内容语文 |
繁體中文 |
中文摘要 |
本研究為改善a-Si: H TFT介電層氮化矽(SiN(下標 x))特性,改變不同的製作非晶矽薄膜電晶體NH3與SiH4氣體比例來沈積介電層氮化矽,由不同比例沈積條件運用電壓應力(Voltage bias stress)量測出其劣化機制,再以各元件特性趨勢進行交叉比對判別出最佳沈積條件。反轉交錯結構(Staggered structure)非晶矽薄膜電晶體在電壓應力量測之結果可由缺陷池模型(Defect poor mode)得知劣化機制為缺陷態產生(Defect state creation)。經由電壓應力測試,當其製程為設計NH3/SiH4氣體流量比為4.5,而沈積厚度為500Ǻ,再通入NH3/SiH4氣體流量比4,沉積厚度為3000Ǻ之製程參數之a-Si: H TFT,擁有較好的元件特性。 |
英文摘要 |
This paper is devoted to the process of dielectric layer SiN(subscript x) in amorphous silicon thin film transistor (a-Si: H TFT), which were fabricated by using the different ratio of SiH4 to NH3. The degradation effect by different SiN(subscript x) deposition condition and voltage bias stress were measured to compare a-Si: H TFT performance for optimizing the SiN(subscript x) deposition process. The degradation effect of a-Si: H TFT can been analyzed by defect poor mode, the studied results show that degradation effect of the inverted staggered structure device with voltage bias stress is defect state creation. According the performance of a-Si: H TFT, which SiN(subscript x) layer was fabricated by the ratio of gas flow in first layer of NH3/SiH4 is 4.5 with a thickness of 500Ǻ, and the ratio of gas flow in second layer of NH3/SiH4 is 4 with a thickness of 3000Ǻ, is a better deposition condition of SiN(subscript x) process. |
主题分类 |
人文學 >
人文學綜合 基礎與應用科學 > 基礎與應用科學綜合 工程學 > 工程學綜合 社會科學 > 社會科學綜合 |
参考文献 |
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