题名

三維異質整合技術應用於超高解析度腦神經訊號擷取感測器

并列篇名

Ultra-High-Resolution Neural Sensing Biosensor Development with 3D Heterogeneous Integration

作者

胡毓宸

关键词

三維積體電路 ; 矽中介層 ; 異質整合 ; 3DIC ; Silicon interposer ; Heterogeneous integration

期刊名称

交通大學電子工程系所學位論文

卷期/出版年月

2017年

学位类别

博士

导师

陳冠能

内容语文

英文

中文摘要

本博士論文旨在研究三維積體電路技術(3D IC)應用於超高解析度腦神經訊號擷取感測器並進行異質整合封裝製程之探討,隨著封裝能力的不同以及動物實驗回饋給工程端的生醫感測器結構優化,本研究提出三種不同結構之超高解析度腦神經訊號擷取感測器,分別為3D-系統級封裝(System-in-Packaging, SiP)型生醫感測器、2.5D-矽中介層(Si-interposer)型生醫感測器以及2.5D-可撓式(PI Flexible-interposer)型生醫感測器。此三種生醫感測器不論從異質整合封裝的角度或是腦神經訊號傳輸的角度,新穎以及跨領域的設計架構使得此超高解析度腦神經訊號擷取感測器具有突破性的重大創新。 近年來,腦神經科學不斷地被各國所重視。其中,如何有效地擷取腦神經訊號更是所有研發之中最關鍵的一步,因此,各類型的腦神經訊號擷取感測器推陳出新,期望能製作出全面性的功能。而一個優異的生醫感測器必須具備低訊號損失、低雜訊以及超高解析度、超高通道的特性;此外,為了達到特定需求,如實驗目標需自由移動,生醫感測器之輕薄短小也有其必要性,因此,本研究利用矽半導體標準製程可達到極細線寬的能力來滿足其超高解析度之需求;同時採用三維積體電路技術來進行高度異質整合,將整體封裝體積降至最小;同時,由於繞線距離大幅降低,雜訊以及訊號損失皆可有效下降。此類型生醫感測器結構分為三大部分:矽穿孔(Through silicon via, TSV)內埋式電極探針、中介層以及生醫晶片。本論文依照功能取向之不同發展三種不同封裝之生醫感測器,但主體架構仍以上述三大結構為主。 第一類型之3D-系統級封裝生醫感測器: 此類型生醫感測器為二電路晶片面對面(face-to-face)接合,並使用打線接合(wire bonding)方式將訊號連接至矽中介層,再利用矽中介層之重新分布繞線(redistribution layer, RDL)以及矽穿孔連接至中介層下方之矽穿孔內埋式電極探針以完成此生醫感測器。系統級封裝擁有較低成本以及開發時間短的優勢,因此率先採用於腦神經訊號擷取感測器。在此一研發階段,本研究同時開發晶片級(chip level)異質整合平台用以克服晶圓級三維積體電路製程過於昂貴的問題。 第二類型2.5D-矽中介層型生醫感測器: 此類型生醫感測器採用矽中介層為關鍵技術,將生醫晶片整合於其之上,由於採用覆晶接合(flip-chip bonding)技術,封裝體積可較第一類型更加微縮,矽中介層下方之矽穿孔內埋式電極探針至生醫晶片的連線距離更加縮短,可降低雜訊與訊號損失。此外,開發生物相容性之金矽穿孔以便於更安全的生物量測環境。 第三類型2.5D-可撓式型生醫感測器: 此類型生醫感測器將矽中介層換為可撓式中介層。因應生物量測之需求,需要更輕以及可撓式之生醫感測器,因此將中介層材料由矽換為Polyimide以得到更佳之量測環境。同時也開發新型矽-Polyimide異質接合方式,發展金屬薄膜接合墊(thin-film metal pad)以取代傳統異方性導電膠(anisotropic conductive film, ACF)及非導電膠(non-conductive paste, NCP) 。 以上三種不同封裝之腦神經訊號擷取感測器皆經由電性量測,包含Kelvin 結構、Daisy chain結構、Comb 結構來確保異質整合連線的完整性;機械強度測試,包含剪切測試來驗證結構之強度;可靠度驗證,包含高溫循環、濕度測試以及直流電流循環測試來檢驗結構的穩定性。相關的材料分析以及製程開發也在本論文中詳述。整體而言,本研究將三維積體電路技術引入至生醫感測器開發,以達到高解析度及高通道數的要求,此新穎結構為世界首創,希冀為我國跨入此尖端領域打下基石。

英文摘要

In this thesis, 3D IC technology is adopted to the neural sensing microstructure. Three different biosensors are proposed and demonstrated with different packaging approaches and animal experiment applications. 3D-SiP neural sensing biosensor, 2.5D-silicon interposer neural sensing biosensor, and 2.5D-flxeible interposer neural sensing biosensor are investigated in this thesis. With the highly integrated neural sensing microstructure, the three novel biosensors are expected to contribute to the biomedical field through identifying and solving unknown biological mysteries. In recent years, neuroscience has been a research area that is valued by many countries. One of the key technologies of that area that is widely interested in is the approach on an effective way of extracting neural signals. Therefore, many neural sensing microstructures have been proposed with the aim of fabricating a well-functional biosensor. A powerful functional neural sensing microstructure is critical in order to detect neural signals with low noise and high spatial resolution. Besides, the miniaturized packaging is also necessary since the mouse experimented on moves around freely during the experiment. In this research, the ultra-high-resolution demand is satisfied with the silicon semiconductor standard process, and the miniaturized packaging is achieved with the 3D heterogeneous integration technology. These biosensors can be divided into three main parts: (1) TSV-embedded electrode probe, (2) interposer, (3) neural sensing circuits. In accordance to the difference of functional aspects, three different packaging biosensors are fabricated in this thesis. TypeⅠ: 3D-SiP neural sensing biosensor Two circuit chips are bonded face-to-face while wire bonding is used to connect the bottom chip to an interposer. The TSV-embedded electrode probe transmits neural signals through TSV and RDL on the interposer to the connected wires. With the advantages of low cost and short development time, SIP is the first packaging approach to be implemented in the neural sensing microstructure. In this development phase, chip-level heterogeneous integration platform is also developed to overcome the over-expensive issue in 3D wafer-level packaging. TypeⅡ: 2.5D-silicon interposer neural sensing biosensor Silicon interposer is the key component of this type. Interposer carries multiple neural sensing circuit chips and does the routing paths between the front side chips and backside TSV-embedded electrode probe with TSV and RDL. As compared to type Ⅰ, flip-chip approach is adopted in this type to further miniaturized the packaging size. In this development phase, biocompatible Au-TSV is developed as the measuring tool that is safer for the living organisms. Type Ⅲ: 2.5D-flxeible interposer neural sensing biosensor In order to fulfill the demand of animal experiment, silicon interposer is replaced with polyimide for better flexibility and lighter. In addition, a novel silicon-polyimide bonding approach is developed for better electrical property than traditional anisotropic conductive film or non-conductive paste bonding approaches. All the biosensors are tested with electrical examinations, including Kelvin structure, Daisy chain, and Comb structure. Mechanical strength test is adopted to ensure the robustness of the structure. Reliability tests are evaluated including thermal cycling test (TCT), un-bias highly accelerated stress test (un-bias HAST) and multiple current stressing test. Material analysis and process developments are detailed depict in this thesis. Overall, 3D IC technology is introduced into biosensor development in this research for ultra-high-resolution. The novel heterogeneous integration structure is a breakthrough in both the medical field and electronic field, and will contribute to multiple disciplines in the future.

主题分类 電機學院 > 電子工程系所
工程學 > 電機工程
工程學 > 電機工程
参考文献
  1. [1] B. Tan, "Deep micro hole drilling in a silicon substrate using multi-bursts of nanosecond UV laser pulses," Journal of Micromechanics and Microengineering, vol. 16, p. 109, 2006.
    連結:
  2. [2] K. Takahashi and M. Sekiguchi, "Through Silicon Via and 3-D Wafer/Chip Stacking Technology," in 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., 2006, pp. 89-92.
    連結:
  3. [3] S. K. Lynch, C. Liu, N. Y. Morgan, X. Xiao, A. A. Gomella, D. Mazilu, et al., "Fabrication of 200 nm period centimeter area hard x-ray absorption gratings by multilayer deposition," Journal of Micromechanics and Microengineering, vol. 22, p. 105007, 2012.
    連結:
  4. [4] C. Chienliu, W. Yeong-Feng, K. Yoshiaki, S. Ji-Jheng, K. Yusuke, L. Chih-Kung, et al., "Etching submicrometer trenches by using the Bosch process and its application to the fabrication of antireflection structures," Journal of Micromechanics and Microengineering, vol. 15, p. 580, 2005.
    連結:
  5. [5] G. Craciun, M. A. Blauw, E. v. d. Drift, P. M. Sarro, and P. J. French, "Temperature influence on etching deep holes with SF 6 /O 2 cryogenic plasma," Journal of Micromechanics and Microengineering, vol. 12, p. 390, 2002.
    連結:
  6. [6] P. J. Rousche and R. A. Normann, "A method for pneumatically inserting an array of penetrating electrodes into cortical tissue," Ann Biomed Eng, vol. 20, pp. 413-22, 1992.
    連結:
  7. [7] Y. Yao, M. N. Gulari, J. A. Wiler, and K. D. Wise, "A Microassembled Low-Profile Three-Dimensional Microelectrode Array for Neural Prosthesis Applications," Journal of Microelectromechanical Systems, vol. 16, pp. 977-988, 2007.
    連結:
  8. [8] S. Spieth, O. Brett, K. Seidl, A. A. A. Aarts, M. A. Erismis, S. Herwik, et al., "A floating 3D silicon microprobe array for neural drug delivery compatible with electrical recording," Journal of Micromechanics and Microengineering, vol. 21, p. 125001, 2011.
    連結:
  9. [9] C. Ming-Yuan, J. Minkyu, T. Kwan Ling, T. Ee Lim, L. Ruiqi, Y. Lei, et al., "A low-profile three-dimensional neural probe array using a silicon lead transfer structure," Journal of Micromechanics and Microengineering, vol. 23, p. 095013, 2013.
    連結:
  10. [10] R. Olsson and K. Wise, "A three-dimensional neural recording microsystem with implantable data compression circuitry," in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005., 2005, pp. 558-559 Vol. 1.
    連結:
  11. [11] R. R. Harrison, P. T. Watkins, R. J. Kier, R. O. Lovejoy, D. J. Black, B. Greger, et al., "A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System," IEEE Journal of Solid-State Circuits, vol. 42, pp. 123-133, 2007.
    連結:
  12. [15] D. C. H. Yu, "Wafer level system integration for SiP," in 2014 IEEE International Electron Devices Meeting, 2014, pp. 27.1.1-27.1.4.
    連結:
  13. [17] A. Yu, J. H. Lau, S. W. Ho, A. Kumar, W. Y. Hnin, W. S. Lee, et al., "Fabrication of High Aspect Ratio TSV and Assembly With Fine-Pitch Low-Cost Solder Microbump for Si Interposer Technology With High-Density Interconnects," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, pp. 1336-1344, 2011.
    連結:
  14. [18] A. Yu, A. Kumar, S. W. Ho, H. W. Yin, J. H. Lau, N. Su, et al., "Development of 25 um-Pitch Microbumps for 3-D Chip Stacking," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 2, pp. 1777-1785, 2012.
    連結:
  15. [19] J. Y. Juang, S. Y. Huang, C. J. Zhan, Y. M. Lin, Y. W. Huang, C. W. Fan, et al., "Effect of metal finishing fabricated by electro and Electroless plating process on reliability performance of um-pitch solder micro bump interconnection," in 2013 IEEE 63rd Electronic Components and Technology Conference, 2013, pp. 653-659.
    連結:
  16. [20] K. Kouichi, Y. Yuko, I. Hitoshi, S. Hiroko, S. Masahiro, K. Takashi, et al., "A Silicon interposer BGA package with Cu-filled TSV and multi-layer Cu-plating interconnect," in 2008 58th Electronic Components and Technology Conference, 2008, pp. 571-576.
    連結:
  17. [22] W. Tang, A. He, Q. Liu, and D. G. Ivey, "Room temperature interfacial reactions in electrodeposited Au/Sn couples," Acta Materialia, vol. 56, pp. 5818-5827, 2008.
    連結:
  18. [23] C. J. Zhan, C. C. Chuang, J. Y. Juang, S. T. Lu, and T. C. Chang, "Assembly and reliability characterization of 3D chip stacking with 30 um pitch lead-free solder micro bump interconnection," in 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC), 2010, pp. 1043-1049.
    連結:
  19. [24] R. Birthe, B. Conrado, O. Robert, F. Pascal, and S. Thomas, "A MEMS-based flexible multichannel ECoG-electrode array," Journal of Neural Engineering, vol. 6, p. 036003, 2009.
    連結:
  20. [25] D. H. Baek, J. S. Park, E. J. Lee, S. J. Shin, J. H. Moon, J. J. Pak, et al., "Interconnection of Multichannel Polyimide Electrodes Using Anisotropic Conductive Films (ACFs) for Biomedical Applications," IEEE Transactions on Biomedical Engineering, vol. 58, pp. 1466-1473, 2011.
    連結:
  21. [26] A. V. Nurmikko, J. P. Donoghue, L. R. Hochberg, W. R. Patterson, Y. K. Song, C. W. Bull, et al., "Listening to Brain Microcircuits for Interfacing With External World Progress in Wireless Implantable Microelectronic Neuroengineering Devices," Proceedings of the IEEE, vol. 98, pp. 375-388, 2010.
    連結:
  22. [27] N. K. Logothetis, J. Pauls, M. Augath, T. Trinath, and A. Oeltermann, "Neurophysiological investigation of the basis of the fMRI signal," Nature, vol. 412, pp. 150-157, 2001.
    連結:
  23. [28] A. M. Sodagar, K. D. Wise, and K. Najafi, "A Wireless Implantable Microsystem for Multichannel Neural Recording," IEEE Transactions on Microwave Theory and Techniques, vol. 57, pp. 2565-2573, 2009.
    連結:
  24. [30] J. Viventi, D.-H. Kim, L. Vigeland, E. S. Frechette, J. A. Blanco, Y.-S. Kim, et al., "Flexible, foldable, actively multiplexed, high-density electrode array for mapping brain activity in vivo," Nat Neurosci, vol. 14, pp. 1599-1605, 2011.
    連結:
  25. [31] C. W. Chang, P. T. Huang, L. C. Chou, S. L. Wu, S. W. Lee, C. T. Chuang, et al., "Through-silicon-via-based double-side integrated microsystem for neural sensing applications," in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, pp. 102-103.
    連結:
  26. [32] L. C. Chou, S. W. Lee, P. T. Huang, C. W. Chang, C. H. Chiang, S. L. Wu, et al., "A TSV-Based Bio-Signal Package With Probe Array," IEEE Electron Device Letters, vol. 35, pp. 256-258, 2014.
    連結:
  27. [33] Y. C. Huang, P. T. Huang, S. L. Wu, Y. C. Hu, Y. H. You, M. Chen, et al., "An ultra-high-density 256-channel/25mm2 neural sensing microsystem using TSV-embedded neural probes," in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 1302-1305.
    連結:
  28. [37] D. Josell and T. P. Moffat, "Extreme Bottom-up Filling of Through Silicon Vias and Damascene Trenches with Gold in a Sulfite Electrolyte," Journal of The Electrochemical Society, vol. 160, pp. D3035-D3039, January 1, 2013 2013.
    連結:
  29. [39] A. C. Fischer, N. Roxhed, G. Stemme, and F. Niklaus, "Low-cost through silicon vias (TSVs) with wire-bonded metal cores and low capacitive substrate-coupling," in 2010 IEEE 23rd International Conference on Micro Electro Mechanical Systems (MEMS), 2010, pp. 480-483.
    連結:
  30. [40] P. T. Huang, S. L. Wu, Y. C. Huang, L. C. Chou, T. C. Huang, T. H. Wang, et al., "2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications," IEEE Transactions on Biomedical Circuits and Systems, vol. 8, pp. 810-823, 2014.
    連結:
  31. [41] Y. Kato, S. Furukawa, K. Samejima, N. Hironaka, and M. Kashino, "Photosensitive-polyimide based method for fabricating various neural electrode architectures," Frontiers in Neuroengineering, vol. 5, 2012-June-18 2012.
    連結:
  32. [42] B. Dong-Hyun, H. Chang-Hee, J. Ha-Chul, K. Seon Min, I. Chang-Hwan, O. Hyun-Jik, et al., "Soldering-based easy packaging of thin polyimide multichannel electrodes for neuro-signal recording," Journal of Micromechanics and Microengineering, vol. 22, p. 115017, 2012.
    連結:
  33. [43] L. Tang, J. Liu, and B. Yang, "An ultraflexible microbubble blood pressure sensor for interventional treatment," in 2015 IEEE International Electron Devices Meeting (IEDM), 2015, pp. 29.7.1-29.7.4.
    連結:
  34. [44] H. G. Lee, Y. W. Choi, J. w. Shin, and K. W. Paik, "Wafer level packages (WLPs) using B-stage non-conductive films (NCFs) for highly reliable 3D-TSV micro-bump interconnection," in 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2015, pp. 331-335.
    連結:
  35. [45] C. Yongwon, S. Jiwon, K. Il, K. Young-soon, and P. Kyoung Wook, "Fine pitch chip on board (CoB) bonding using B-stage non-conductive film (NCF) for 3D TSV vertical interconnection," in 2013 IEEE International Symposium on Advanced Packaging Materials, 2013, pp. 186-191.
    連結:
  36. [46] K. W. Paik, "Recent advances in anisotropic conductive adhesives (ACAs) materials and processing technology," in 2010 IEEE CPMT Symposium Japan, 2010, pp. 1-4.
    連結:
  37. [47] S.-M. Lee, B.-G. Kim, and Y.-H. Kim, "Non-Conductive Adhesive (NCA) Trapping Study in Chip on Glass Joints Fabricated Using Sn Bumps and NCA," MATERIALS TRANSACTIONS, vol. 49, pp. 2100-2106, 2008.
    連結:
  38. [48] K.-L. Suk, K. Choo, S. J. Kim, J.-S. Kim, and K.-W. Paik, "Studies on various chip-on-film (COF) packages using ultra fine pitch two-metal layer flexible printed circuits (two-metal layer FPCs)," Microelectronics Reliability, vol. 52, pp. 1182-1188, 2012.
    連結:
  39. [12] A. Pizzagalli, T. Buisson, and R. Beica, "3D technology applications market trends & key challenges," in 25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014), 2014, pp. 78-81.
  40. [13] M. G. Farooq, T. L. Graves-Abe, W. F. Landers, C. Kothandaraman, B. A. Himmel, P. S. Andry, et al., "3D copper TSV integration, testing and reliability," in 2011 International Electron Devices Meeting, 2011, pp. 7.1.1-7.1.4.
  41. [14] W. S. Liao, H. N. Chen, K. K. Yen, E. H. Yeh, F. W. Kuo, T. J. Yeh, et al., "3D IC heterogeneous integration of GPS RF receiver, baseband, and DRAM on CoWoS with system BIST solution," in 2013 Symposium on VLSI Circuits, 2013, pp. C18-C19.
  42. [16] A. Yu, J. H. Lau, S. W. Ho, A. Kumar, W. Y. Hnin, D. Q. Yu, et al., "Study of 15 um pitch solder microbumps for 3D IC integration," in 2009 59th Electronic Components and Technology Conference, 2009, pp. 6-10.
  43. [21] L. Yin, S. J. Meschter, and T. J. Singler, "Wetting in the Au–Sn System," Acta Materialia, vol. 52, pp. 2873-2888, 6/7/ 2004.
  44. [29] B. Gosselin, A. E. Ayoub, J. F. Roy, M. Sawan, F. Lepore, A. Chaudhuri, et al., "A Mixed-Signal Multichip Neural Recording Interface With Bandwidth Reduction," IEEE Transactions on Biomedical Circuits and Systems, vol. 3, pp. 129-141, 2009.
  45. [34] S. L. Chua, A. Razzaq, K. H. Wee, K. H. Li, H. Yu, and C. S. Tan, "3D CMOS-MEMS stacking with TSV-less and face-to-face direct metal bonding," in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, pp. 1-2.
  46. [35] W. A. Vitale, M. Fernández-Bolaños, A. Klumpp, J. Weber, P. Ramm, and A. M. Ionescu, "Ultra fine-pitch TSV technology for ultra-dense high-Q RF inductors," in 2015 Symposium on VLSI Technology (VLSI Technology), 2015, pp. T52-T53.
  47. [36] P. T. Huang, L. C. Chou, T. C. Huang, S. L. Wu, T. S. Wang, Y. R. Lin, et al., "18.6 2.5D heterogeneously integrated bio-sensing microsystem for multi-channel neural-sensing applications," in 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014, pp. 320-321.
  48. [38] N. Quack, J. Sadie, V. Subramanian, and M. C. Wu, "Through Silicon Vias and thermocompression bonding using inkjet-printed gold nanoparticles for heterogeneous MEMS integration," in 2013 Transducers & Eurosensors XXVII: The 17th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS & EUROSENSORS XXVII), 2013, pp. 834-837.