三維架構之雙輻射狀功率合成技術之研究

葉景富

doi:10.6342/NTU.2015.02367

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三维架构之双辐射状功率合成技术之研究

Research of 3-D Dual-Radial Power Combining Technique

叶景富 , 博士　　导师：黄天伟　　

英文 DOI： 10.6342/NTU.2015.02367

三维功率放大器架构；互补金氧化半导体；折叠变压器；辐射状功率分配网路；辐射状功率合成网路；多模操作； 3D PA architecture ； CMOS ； folded-transformer ； radial power distribution network ； radial combining network ； multi-mode operation

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摘要 │ 参考文献 (44) │ 被引用文献 (1) │ 国际计量

摘要〈TOP〉

并列摘要〈TOP〉

The research on the development of on-chip power combining techniques is presented this dissertation.
	For the first time, an innovative 3-D dual-radial PA architecture is proposed. It provides design freedom of impedance selection of power device in TF-based mm-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. This technique presents not only a power combiner but a new PA architecture. By taking advantage of the dual-radial architecture, the power splitting network and power combining network can share the same active area to complete the fully integration with symmetry layout. This new technique also possesses the impedance freedom to make its feasibility from mm-wave frequency band to microwave frequency band. To demonstrates the feasibility of the proposed 3-D dual-radial PA architecture. Various 3-D PAs have been successfully implemented in different frequency application and in different CMOS process.
	In terms of mm-wave 3-D PA, a 4-way 60-GHz 3-D PA and 8-way balanced 3-D PA are demonstrated not only the high output power but also high PAD performance. The 4-way 60-GHz PA is also the first mm-wave PA equipped with impedance compensation mechanism for multi-power operation. The 8-way balanced 3-D PA demonstrates the highest 60-GHz output power of 23 dBm in CMOS technology. The chip area of 8-way 60-GHz PA is only 0.72 mm2. 
	In terms of microwave 3-D PA, a bowtie dual-radial architecture is proposed to mitigate the inherent feedback capacitor existing in the original dual-radial PA architecture for unconditional stability consideration. This idea is realized in 24-GHz and 5-GHz PA. The 4-way 3-D bowtie radial PA can achieves highest Pout of 26.1 dBm and high PAD of 635 mW/mm2. Furthermore, the proposed 3-D PA architecture is also adopted to implement a half-watt and one-watt 5-GHz PA in 180-nm CMOS. The proposed fully integrated 5-GHz PA can achieve Pout of 29.5 dBm in cost effective 180-nm CMOS with only 3.33 mm2.
A 60-GHz power amplifier utilizing the pre-distortion linearizer was demonstrated at last. The proposed linearization technique can significantly improve IMD3 distortion over 30 dBc at 60-GHz. This technique is valid to cover the wide bandwidth form 57 GHz to 66 GHz. The performances of IP1dB of the 60-GHz PA can be extended around 7 dB and the corresponding OP1dB can be boosted 3 dB in average by enabling the proposed linearization technique.

参考文献 ( 44 ) 〈TOP〉

[59] Y. Kawano, A. Mineyama, T. Suzuki, M. Sato, T. Hirose, K. Joshin, “A Fully-Integrated K-band CMOS Power Amplifier with Psat of 23.8 dBm and PAE of 25.1 %,” in RFIC Dig., May 2011, pp. 1–4.
连结：
[60] K. Kim, and C. Nguyen, “A 16.5-28 GHz 0.18-μm BiCMOS power amplifier with flat 19.4 +/- 1.2 dBm output power,” IEEE Microw. Wireless Compon. Lett, vol. 24, no. 2, pp. 108- 110, Jan. 2014.
连结：
[61] C.-C Kuo, Y.-H. Lin, H.-H. Lu, and H. Wang, “A K-band compact fully integrated transformer power amplifier in 0.18-μm CMOS technology,” in APMC. Dig., Nov. 2013, pp. 597-599.
连结：
[62] J. Y.-C. Liu, C.-T. Chen and S. S. H. Hsu, “A K-band power amplifier with adaptive bias in 90-nm CMOS,” IEEE EuMC Dig., Oct. 2014. Pp. 1376-1379.
连结：
[64] V. Giammello, E. Ragonese, and G. Palmisano, “A 15-dBm SiGe BiCMOS PA for 77-GHz automotive radar,” IEEE Trans. Micro-wave Theory Tech., vol. 59, no. 11, pp. 2910–2918, Nov. 2011.
连结：

被引用文献 (1) 〈TOP〉

许峰毓(2016)。40奈米LDMOS多路变压器结合及65奈米CMOS预失真线性器功率放大器之研制。台湾大学电信工程学研究所学位论文。2016。1-84。

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DOI可强化引用精确性、增强学术圈连结，并给予使用者跨平台的良好使用经验，目前在全世界已有超过五千万个对象申请DOI。如想对DOI的使用与概念有进一步了解，请参考（）。